Mar 17 2010
Ambarella, Inc., a leader in low-power, high-definition video compression and image processing semiconductors, today announced the availability of the A5s Media Processor for the IP camera and video surveillance markets.
Building on the success of the A2, the HD IP camera chip used by most leading companies today, the new A5s delivers HD H.264 multi-streaming, best-in-class image quality, a flexible ARM11 CPU, and record low power to enable IP cameras from entry-level SD to HD and beyond. Ambarella will demonstrate the A5s IP Camera Reference Platform at invitation-only events during the International Security Conference & Expo (ISC West 2010) to be held in Las Vegas, on March 23-25.
With A5s, Ambarella brings a combination of industry-firsts to the IP camera market:
- Multi-streaming HD 1080p30 H.264 encode plus simultaneous VGAp30 H.264 for thumbview and 5 MPixel (MP) JPEG for high-resolution makes HD surveillance practical;
- Image Sensor Pipeline (ISP) with 3D Motion Compensated Temporal Filtering (MCTF) and per-pixel Local Exposure Correction (LEC) improves video in challenging lighting conditions;
- 528 MHz ARM1136J-S™ CPU with AES/3DES crypto engine delivers performance headroom for robust application support and secure video transmission;
- Low-power 45nm CMOS technology and SoC integration enables power- and space-sensitive applications, such as battery-operated wearable HD cameras and mini-domes with analytics.
The royalty-free, Linux-based A5s IP Camera Reference Platform comes with all documentation and software necessary to allow developers to quickly create fully-featured product lines of SD and HD IP cameras and video servers. A rich set of libraries and the headroom of the ARM11 CPU promote differentiation, such as tampering detection, face tracking, and encryption, while tunable AE, AWB, and AF assist in reducing optics costs and optimize quality.
“We believe the A5s represents a significant step forward in the industry’s transition to IP cameras,” commented Didier LeGall, Ambarella executive vice-president of sales and marketing. “With the A5s IP Camera Reference Platform, vendors can jump ahead of the curve and leverage Ambarella’s consumer-driven roadmap which brings rapid innovation and aggressive silicon integration to an increasingly demanding market.”
Further Technical Details
The A5s Media Processor system-on-a-chip (SoC) integrates an ARM1136J-S CPU, a DSP subsystem for ISP and H.264/MJPEG codecs, and peripherals (16-bit LPDDR2/DDR2/DDR3, NAND, SLVDS/parallel sensor i/f, BT.656 in/out, analog SD/HD out, HDMI, Ethernet MAC, USB 2.0, SSI/SPI, I2S audio, IDC, UART, RTC, WDT, GPIO, iris/AF motor stepper, and SDIO for SD Card and WiFi/3G). Based on low-power 45 nm CMOS technology, A5s consumes less than 1 Watt (including DDR) at full HD 1080p30, allowing an IP camera design to use as little as 2 Watts.
The ISP supports up to 32 MP resolution, 8- to 14-bit pixel processing, and 240 MP per-second capture, equivalent to 8 MP at 30 frames per second, enabling Digital Pan/Tilt/Zoom and oversampling to reduce aliasing. 3D MTCF noise reduction improves low-light imaging without causing motion blur, and LEC that brings out detail by adjusting the contrast for shadows and backlit portions on a pixel-by-pixel basis. Flexible 3A and video stabilization allows for differentiation and a wide selection of sensors is supported, including Aptina MT9M033 (1.3 MP WDR), Aptina MT9J003 (10 MP), OmniVision OV2715 (2 MP), and Sony IMX036 (3 MP).
Based on Ambarella’s professional broadcast technology, the H.264 Baseline/Main/High Profile encoder delivers high compression efficiency and is tuned for video surveillance with attention to clarity of motion, region-of-interest, and low delay. The smart H.264/MJPEG encoder supports up to 32 MP resolution and up to four streams with on-the-fly changes of frame rate, GOP, and quality that can be controlled by, for instance, faces detected or activity level.